RF Tips & Tricks

FSK (Frequency Shift Keying)

With FSK, two slightly different frequencies are used to represent a logic 1-bit and a logic 0-bit. Many FSK receivers have a CD (Carrier Detect) pin which makes it easier to determine when a signal is being transmitted. If there is no CD output, there is often an RSSI (Received Signal Strength Indicator) signal which can be used to create a CD signal using the simple comparator circuit shown below, configured so that the output is high when the non-inverting input is greater than the inverting input (i.e. in the presence of the carrier) and low when the inverting input is higher (i.e. in the absence of the carrier). If the RSSI signal exhibits low level noise, the inverting input can be connected to a low reference voltage, slightly higher than the noise level.

ASK (Amplitude Shift Keying)

The simulated signals graphed below are based on oscilloscope screenshots shown in RF Noise vs. Signal

The linear (i.e. analog) output of the superregenerative receiver is the demodulated signal (+noise). In the absence of a strong signal, the AGC circuits increase the gain so there is a near constant output of random noise. (The slope of the initial pulse, above, shows the AGC reducing gain in response to a strong signal.) The noise is due to a combination of factors. The gain of a superregenerative receiver can be as high as 1,000,000, the AGC circuit and the dataslicer both tend to maximize low level signals (and/or noise). Wikipedia has a good article on superregenerative receivers. If we measure the average amplitude, there is little difference between the noise state on the left and the signal state on the right. And, if we try to decipher the noise based on RS232 timing, the output will just be random noise. It will be difficult to determine where the noise ends and the signal begins without some type of marker.

However, if we use a relatively wide lead-in pulse as a sync or STX indicator, the pulse does two things. It resets the AGC and ATC based on the signal strength and it signals the start of a transmission. We can measure the amplitude of the pulse at point A and measure the amplitude of the space at point B. The difference, A-B, indicates modulation depth and is a good proxy for Received Signal Strength Indicator (RSSI).

A frequent suggestion is to use RS232 and train the receiver with a preamble consisting of several $55 (01010101 binary) which is roughly equivalent to the closely spaced pulses at point C above. The problem with this approach is that it is hard to detect the 01010101s emerging out of the normal noise. See the screenshot at the bottom of the page in the RF Noise vs. Signal page. It is simpler and more reliable to look for a wide lead-in pulse and use something like the NEC protocol which incorporates error detection. Here is an example of simple transmit and receive routines using 8-pin PICs and PicBasicPro and the TX/RX setup shown below.

If you have a lot of data to transmit, you can combine the wide lead-in pulse with RS232 strings although you will have to devise your own error detection - Manchester encoding is one method. You can improve the purely RS232 method by using $FF,$FF,$FF,$FF,$00,$00,$55 as a preamble and WAITing for the $55. Note that this assumes 9600bps. At higher data rates increase the number of &FF & $00 proportional to the increase in speed, maintaining the $FF:$00 ratio at 2:1.

The linear output is input to a data slicer circuit like the one shown below. The capacitor, C1, will charge to the average signal strength. When the signal is above the average, the output is +5V. When the signal is below the average, the output is 0V. The result is the clean digital signal shown below the data slicer.

Closely spaced data pulses will raise the charge on C1 which will raise the threshold, decreasing sensitivity. Widely spaced data pulses will lower the charge on C1 which will lower the threshold, increasing sensitivity. The data pulses at C are the same width as the spaces with the average being equal to 1/2 the pulse amplitude. At D, the pulse widths are 1/3 the width of the spaces and the average is 1/4 of the pulse amplitude. It is desirable to have DC balance with pulses and spaces approximately equal over a relatively short time range. This prevents biasing the threshold towards either high or low sensitivity.

The NEC protocol, a variation of which is used by X-10, sends each data byte twice in bitwise complementary form. Each 1-bit in the first byte of the pair becomes a 0-bit in the second and each 0-bit in the first becomes a 1-bit in the second. This maintains DC balance over over the span of each data/complement byte pair. This also provides built-in error detection as the byte pairs equal zero when ANDed and equal 0xFF when summed.

Other Considerations

Most of the receiver digital output levels for a Logic HI are less than Vdd. Typical values are 0.7Vdd to 0.8Vdd which, with Vdd=5V, is 3.5V to 4.0V. Some microcontroller inputs may need higher input levels for Logic HI. For example, most PICs need 0.8Vdd for Schmitt Trigger inputs but only 2V (with Vdd=5V) for TTL inputs. Consult the datasheets for the receiver and microcontroller.

RS232 Considerations

Most PIC (and other microcontroller) programming languages have built-in commands for handling RS232 serial communications so it is tempting to use them for wireless links. This can work quite well as long as you are aware of potential pitfalls. The diagram below represents one RS232 byte at 9600 8N1 (9600 bits per second, 8 data bits, No parity, 1 stop bit) at the digital output of an RF receiver.

First, RS232 is asynchronous. The RS232 receiver code assumes the first pulse it sees is a start bit and then samples at the mid-point of where it expects each following bit period (104ÁS apart at 9600 bps). In the absence of a signal, it will interpret the random noise pulses that happen to occur at the sampling times as logic 1 bits and any spaces that coincide with sampling times as logic 0 bits, outputting meaningless garbage. We need a way to signal the start of a transmission (STX). Many people recommend transmitting a preamble of alternating logic 1 and logic 0 bits (e.g. 01010101 or hexadecimal 55). There is a better method. Starting each transmission with a lengthy (2-5mS) pulse followed by a space about 1/2 the width of the pulse will set the receiver's AGC level to suppress the random noise pulses. The space assures the next pulse seen is our RS232 start pulse. We can look for the lengthy pulse and then call SerIn to process the data that follows.

Second, with RS232 (without Manchester coding) there is no way to guarantee DC balance so we need to keep message packets relatively short and separated by sufficient time to allow the RF receiver to reset. You can experiment with the initial pulse/space width, the number of data bytes and trailing space but I suggest starting with 5mS/2.5mS with initial packet size limited to 5-6 bytes and a trailer of 10-20mS.

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